Chapter 14: Appendix

14.1 Immunity/Susceptibility

14.1.1 IEC-62433-4 IC-Immunity Model 

Compliance-Scope supports IEC-62433-4 IC Immunity Model (ICIM) for Conducted Immunity (CI). The details of the model are given in the detailed documentation of IEC-62433-4. The complete article can be found here: (https://webstore.iec.ch/publication/24943 ). 

The abstract of the article available in open literature is provided below:

“IEC 62433-4:2016 specifies a flow for deriving a macro-model to allow the simulation of the conducted immunity levels of an integrated circuit (IC). This model is commonly called Integrated Circuit Immunity Model - Conducted Immunity, ICIM-CI. It is intended to be used for predicting the levels of immunity to conducted RF disturbances applied on IC pins. In order to evaluate the immunity threshold of an electronic device, this macro-model will be inserted in an electrical circuit simulation tool. This macro-model can be used to model both analogue and digital ICs (input/output, digital core and supply). This macro-model does not take into account the non-linear effects of the IC. The added value of ICIM-CI is that it could also be used for immunity prediction at board and system level through simulations. This part of IEC 62433 has two main parts:

• the electrical description of ICIM-CI macro-model elements;

• a universal data exchange format called CIML based on XML. This format allows ICIM-CI to be encoded in a more useable and generic form for immunity simulation.”

In this document, the basic principles of IEC-62433-4 is discussed. The reader is encouraged to go through the full documentation for detailed understanding. For our discussion, let us consider an IC with 10 pins as shown in Figure 14-1.

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The basic purpose of IEC-62433-4 is to provide a modeling-framework in which a typical IC can be modeled for a BCI simulation. A complete black-box representation of the IC is difficult to generate:

(a) Why not a complete S-parameter block: The IC contains non-linear elements, it cannot be represented by a Linear, Time Invariant (LTI) black-box. In other words, for the example IC of Figure 14-1, a 10 × 10 S-parameter block cannot be used to macro-model the IC.

(b)  Why not a complete SPICE sub-ckt: This is possible in theory. However, the IC manufacturer will not be willing to share the detailed information of the internals of the IC. Also, most ICs contain more than million transistors along with parasitic elements which will be extremely time consuming to process in a BCI simulation.

Therefore, IEC-62433-4 resorts to modeling an IC for BCI simulation using 2 types of models:

14.1.1.1 ICIM PDN model

The “Passive Distribution Network” (PDN) represents the impedance seen at any “Disturbed Input” (DI) of the corresponding IC. 

The PDN can be used to define the impedance of:

(a) 1 pin with respect to its ground, as shown in Figure 14-2, for Pin 1 (DI 1) and its ground Pin 5 (GND for DI 1). The PDN itself can be represented by either (i) a SPICE subckt (ii) a touchstone file (here s1p file).

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(b) 2 differential pins with respect to their ground, as shown in Figure 14-3, for Pins 2 and 3 and its ground Pin 5. The PDN itself can be represented by either (i) a SPICE subckt (ii) a touchstone file (here s2p file).

(c) multi-pin model with respect to their ground.

This modeling methodology enables the computation of impedance as seen by the disturbed IC pins without the need for obtaining an entire transfer function of the IC itself. The PDN values themselves can be computed by VNA measurements on the IC pins or using circuit simulation tools if the circuit level description of the IC is available.

14.1.1.2 ICIM IB model

The “Internal Behavior” (IB) model specifies the pass/fail limit lines for the specific IC. Let us denote the IB for aggressor pin “i” and victim pin “j” as IB (j, i). Then, the IB (j, i) represents the “Power vs Frequency” profile which when applied to Pin i, will cause a failure in Pin j. This, therefore represents a “limit-line” for the disturbed input (Pin i). 

The IB model can be generated by using DPI tests on the IC or from circuit simulation if the circuit details of the IC is available.

In the above example, shown in Figure 14-4, the profile of power in dBmW is generated for aggressor pin Pin 1 for the victim Pin 7. If the noise power level at IC Pin 1 exceeds that in the IB, it will generate a failure in Pin 7. The pass-fail region corresponding to this IB is shown in Figure 14-5.

14.1.2 Injection Clamp Model 

14.1.2.1 Explanation of Compliance-Scope injection clamp library model

Compliance-Scope injection clamp library uses equivalent circuit/electromagnetic models for injection clamps generated from measurements performed on the injection clamp. For each clamp, Compliance-Scope uses 2 different network-parameter models:

14.1.2.1.1 Injection clamp to cable coupling model

The injection clamp to cable model is captured through measurement as an s3p file. This data is used to generate applicable snp file for any multi-wire harness case using proprietary technology. 

To generate the equivalent model, measurement is performed with a single small cable kept inside the injection clamp as shown in Fig. 14-7.  Three port measurement is performed using a network analyzer. The portion of the cable jutting out of the injection clamp and the L-clamps are de-embedded to generate the library s3p model for the particular injection probe.

Representative de-embedded measurement data for F140 clamp and a single cable with radius 2mm is shown below:

14.1.2.1.2 Injection clamp calibration model

The injection clamp calibration model is used for calibration to determine power level in open loop and closed loop simulation.

To obtain this calibration model, S-parameter measurement is done with bulk current injection probe fixture as shown in Fig. 14-9.  

14.1.2.1.3 Injection clamp datasheet

This data is available from the manufacturer. An example is shown below.

14.1.2.2 Data required for building a clamp model into Compliance-Scope library

Any one of the following options may be used for generating data for building Compliance-Scope injection clamp library model.

Option 1: 

(1) 3D geometry (sat file) for the desired clamp

Option 2:

(1) De-embedded s3p file for injection clamp-single cable

(2) Injection clamp calibration s3p file

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If available the datasheet of the clamp (similar to Fig. 14-11)

Table 5: Data required for building Compliance-Scope clamp model

14.2 Emissions

14.2.1: IEC-62433-2 IC-Emission Model - Conducted Emissions 

Compliance-Scope supports IEC-62433-2 IC Emission Model for Conducted Emissions (ICEM-CE). The details of the model are given in the detailed documentation of IEC-62433-2. The complete article can be found here: (https://webstore.iec.ch/publication/27589 )

14.2.2: IEC-62433-3 IC-Emission Model - Radiated Emissions 

IEC-62433-3 IC Emission Model for Radiated Emissions (ICEM-RE). The details of the model are given in the detailed documentation of IEC-62433-3. The complete article can be found here: (https://webstore.iec.ch/publication/33478 )

So far in our correlation exercises we have primarily used ICEM-CE for the IC. The direct radiation from the IC to the antenna which is outlined by ICEM-RE was negligible compared to the radiated emission from the PCB and cables.